Table 3: Synthesis results for a 40 30 grid.

grid hardware resource utilization
Xilinx FPGA XC4VLX160ff1513-12

Number of Slice Flip Flops 31,642/135,168 (23.4%)
Number of 4 input LUTs 113,458/135,168 (83.94%)
Number of occupied Slices 61,727/67,584 (91.33%)
Frequency 130 MHz