Research Article
Architectural Synthesis of Fixed-Point DSP Datapaths Using FPGAs
Algorithm 1
Optimization procedure.
| Input: , | | Output: , , , | | () Extract , , | | () Find initial mapping | | () Compute initial area from | | () | | | | | | iteration = accepted = exit = 0 | | () while exit condition do | | () | | () iteration = iteration + 1 | | () Perform change to current | | () Compute area A from (Algorithm 2) | | () | | () if then | | () | | | | accepted = accepted + 1 | | () else | | () , | | () if then | | () , | | accepted = accepted + 1 | | () end if | | () end if | | () if equilibrium state then | | (20) | | (21) iterations = accepted = exit = 0 | | (22) else if frozen state then | | (23) | | (24) iterations = accepted = 0 | | (25) exit = exit + 1 | | (26) end if | | (27) if restart condition then | | (28) | | | | (29) end if | | (30) end while |
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