Research Article
A System on a Programmable Chip Architecture for Data-Dependent Superimposed Training Channel Estimation
Table 2
Synthesis summary.
| | Implementation | Software | Hardware | | Max. frequency | 238.72 MHz | 238.72 MHz |
| | Space (total) | 29% | 68% | | ALUTs | 15% | 60% | | Registers | 13% | 24% | | DSP blocks | 10% | 100% |
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