Reconfigurable Hardware Implementation of a Multivariate Polynomial Interpolation Algorithm

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<g transform="matrix(.017,-0,0,-.017,.062,7.675)"><path d="M495 86q-46 -47 -87 -72.5t-63 -25.5q-43 0 -16 107l49 210q7 34 8 50.5t-3 21t-13 4.5q-35 0 -109.5 -72.5t-115.5 -140.5q-21 -75 -38 -159q-50 -10 -76 -21l-6 8l84 340q8 35 -4 35q-17 0 -67 -46l-15 26q44 44 85.5 70.5t64.5 26.5q35 0 10 -103l-24 -98h2
q42 56 97 103.5t96 71.5q46 26 74 26q9 0 16 -2.5t14 -11.5t9.5 -24.5t-1 -44t-13.5 -68.5q-30 -117 -47 -200q-4 -19 -3.5 -25t6.5 -6q21 0 70 48z" id="x1D45B"></path></g>
</svg>.</table>

International Journal of Reconfigurable Computing

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Figure 4

Figure 4: Reconfigurable Hardware Implementation of a Multivariate Polynomial Interpolation Algorithm 