Design of a Reconfigurable Pulsed Quad-Cell for Cellular-Automata-Based Conformal Computing

Figure 2

Logic units (LUs) and data latches (RS latches). To the 𝐴 input and from the 𝑍 output, the black wires carry “1” pulses and the gray wires carry “0” pulses. To the 𝐵 input, the black and gray wires are the 𝑄 and 𝑄 outputs, respectively, of the RS latch.