3D Network-on-Chip Architectures Using Homogeneous Meshes and Heterogeneous Floorplans

<table>Latency as number of virtual channels is varied for <i>xerox</i>.</table>

International Journal of Reconfigurable Computing

Figure 9: 3D Network-on-Chip Architectures Using Homogeneous Meshes and Heterogeneous Floorplans 