New Three-Level Resource Management Enhancing Quality of Offline Hardware Task Placement on FPGA

Table 1

Example of final results of Step 2.

RZ types	RZ resources	Assigned tasks 𝑇𝑖 (D) and RZ workloads	Costs D 𝑇𝑖(D)
𝑅𝑍1	{25𝑅𝐵1,42𝑅𝐵2}	𝑇1 (720), 𝑇3 (140) 66%	𝑇2(∞),𝑇4(∞),𝑇5(∞)
𝑅𝑍2	{52𝑅𝐵2,12𝑅𝐵4}	𝑇2 (1620), 𝑇4 (0) 137%	𝑇1(∞),𝑇3(∞),𝑇5(∞)
𝑅𝑍3	{46𝑅𝐵1,53𝑅𝐵2,1𝑅𝐵3,1𝑅𝐵4}	𝑇5 (0) 35%	𝑇1(2552),𝑇2(∞)𝑇3(1972),𝑇4(∞)