New Three-Level Resource Management Enhancing Quality of Offline Hardware Task Placement on FPGA

Table 2

Hardware task features.

	Instances	RBs	WCET(𝜇s)	Period (𝜇s)	Configuration overhead (𝜇s)	Preemptio points (𝜇s)
MDCT	{𝑇1,𝑇9,𝑇10,𝑇11,𝑇12}	{2𝑅𝐵1,12𝑅𝐵2,3𝑅𝐵3,0𝑅𝐵4}	40552	416666	1856	10000, 20000, 30000
AES	{𝑇2}	{4𝑅𝐵1,7𝑅𝐵2,1𝑅𝐵3,1𝑅𝐵4}	51540	100000	2185	30000, 40000
DDS	{𝑇3}	{0𝑅𝐵1,1𝑅𝐵2,1𝑅𝐵3,1𝑅𝐵4}	5000	12000	432	none
T48	{𝑇4}	{5𝑅𝐵1,4𝑅𝐵2,0𝑅𝐵3,0𝑅𝐵4}	20000	50000	605	800, 10600, 16300
JPEG	{𝑇5}	{8𝑅𝐵1,12𝑅𝐵2,0𝑅𝐵3,2𝑅𝐵4}	350000	416666	2421	200000, 300000
MULTF	{𝑇6}	{1𝑅𝐵1,1𝑅𝐵2,0𝑅𝐵3,1𝑅𝐵4}	5600	10000	491	1400, 2350, 4020, 5170
FIR	{𝑇7,𝑇13,𝑇14}	{0𝑅𝐵1,1𝑅𝐵2,0𝑅𝐵3,1𝑅𝐵4}	300	2000	112	120, 210, 255
VGA	{𝑇8}	{2𝑅𝐵1,4𝑅𝐵2,1𝑅𝐵3,0𝑅𝐵4}	5000	10000	681	1650, 2700