Research Article
Exploration of Heterogeneous FPGA Architectures
Table 2
Open core benchmarks set II.
| Circuit name | No of inputs | No of outputs | No of LUTs | No of multipliers () | No of adders () |
| cf_fir_3_8_8 | 42 | 18 | 159 | 4 | 3 | cf_fir_7_16_16 | 146 | 35 | 638 | 8 | 14 | cfft | 20 | 40 | 1511 | — | 26 | cordic_p2r | 18 | 32 | 803 | — | 43 | cordi_r2p | 34 | 40 | 1328 | — | 52 | fm | 9 | 12 | 1308 | 1 | 19 | fm_receiver | 10 | 12 | 910 | 1 | 20 | lms | 18 | 16 | 940 | 10 | 11 | reed_solomon | 138 | 128 | 537 | 16 | 16 |
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