Research Article
Exploration of Heterogeneous FPGA Architectures
Table 4
Area of different blocks of three sets.
| | Block name | Inputs | Outputs | Block size |
| | clb | 4 | 1 | 58500 | | mult () | 16 | 16 | 1075250 | | slansky_16 | 32 | 16 | 306750 | | sff_8 | 8 | 8 | 36000 | | sub_8 | 17 | 8 | 154500 | | smux_16 | 33 | 16 | 36000 | | mult () | 32 | 32 | 1974000 | | adder () | 41 | 21 | 207000 | | mult () | 36 | 36 | 2498300 | | sram | — | — | 1500 | | buffer | 1 | 1 | 1000 | | flip-flop | 1 | 1 | 4500 | | mux 2 : 1 | 2 | 1 | 1750 |
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