A High-Throughput Hardware Architecture for the H.264/AVC Half-Pixel Motion Estimation Targeting High-Definition Videos

Table 6

Performance comparison.

	Yalcin and Hamzaoglu [9]	Oktem and Hamzaoglu [10]	This Work
FPGA Device	Xilinx VirtexII	Xilinx VirtexII	Xilinx VirtexII
Frequency (MHz)	85	60	91
Cycles to process; a macroblock (16×16)	720	768	148
Support to variable; block size	Yes	Yes	No