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International Journal of Reconfigurable Computing
Volume 2011, Article ID 406857, 17 pages
Research Article

High-Level Synthesis of In-Circuit Assertions for Verification, Debugging, and Timing Analysis

NSF Center for High-Performance Reconfigurable Computing (CHREC), ECE Department, University of Florida, Gainesville, FL 32611-6200, USA

Received 13 August 2010; Accepted 14 December 2010

Academic Editor: J. M. P. Cardoso

Copyright © 2011 John Curreri et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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