Research Article
Reconfiguration Techniques for Self-X Power and Performance Management on Xilinx Virtex-II/Virtex-II-Pro FPGAs
Table 2
OSC macro 2 frequency (MHz).
| Device id /voltage[V] | 1.10 | 1.20 | 1.30 | 1.40 | 1.50 | 1.60 |
| Board 1 | 66.304 | 72.064 | 75.904 | 78.08 | 78.592 | 77.696 | Board 2 | 67.456 | 72.704 | 76.16 | 77.824 | 77.952 | 77.312 | Board 3 | 65.536 | 71.04 | 74.752 | 76.928 | 77.824 | 77.44 | Board 4 | 66.432 | 72.448 | 76.672 | 79.232 | 80.384 | 80 | Board 5 | 66.688 | 72.192 | 76.416 | 78.464 | 79.104 | 78.208 |
| Mean | 66.4832 | 72.0896 | 75.9808 | 78.1056 | 78.7712 | 78.1312 | Min | 65.536 | 71.04 | 74.752 | 76.928 | 77.824 | 77.312 | Max | 67.456 | 72.704 | 76.672 | 79.232 | 80.384 | 80 | Delta | 1.92 | 1.664 | 1.92 | 2.304 | 2.56 | 2.688 |
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