An NoC Traffic Compiler for Efficient FPGA Implementation of Sparse Graph-Oriented Workloads

Table 3

NoC dynamic power model.

Datawidth (Application)	Block	dynamic power at diff. activity (mW)
		0%	25%	50%	75%	100%
52 (ConceptNet, Bellman-Ford)	Split	0.26	1.07	1.45	1.65	1.84
	Merge	0.72	1.58	2.1	2.49	2.82
84 (Matrix-Vector Multiply, Sparse Marix Solve)	Split	0.32	1.35	1.78	2.02	2.26
	Merge	0.9	1.87	2.45	2.88	3.25