International Journal of Reconfigurable Computing / 2012 / Article / Fig 8

Research Article

Configurable Transmitter and Systolic Channel Estimator Architectures for Data-Dependent Superimposed Training Communications Systems

Figure 8

Systolic channel estimator for DDST receiver. (a) Simplified architecture; (b) the PE module.
236372.fig.008a
(a)
236372.fig.008b
(b)