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International Journal of Reconfigurable Computing
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International Journal of Reconfigurable Computing
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2012
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Article
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Tab 3
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Research Article
Exploring Many-Core Design Templates for FPGAs and ASICs
Table 3
Scaled GPGPU design for 65 nm process.
Problem
Per-iteration time
Scaled per-iteration time
40 nm (
s)
65 nm (
s)
32-Node
21.0
174
37-Node
37.8
312