International Journal of Reconfigurable Computing / 2012 / Article / Tab 4

Research Article

Exploring Many-Core Design Templates for FPGAs and ASICs

Table 4

32-Node. Performance comparison between MARC, hand-optimized, and GPGPU.

Configuration Per iteration Relative
Time ( s) Perf.

GPGPU scaled reference 174 0.0024
MARC-Ropt-F 2550 0.0002
MARC-C1-F 172 0.0025
MARC-C2-F 124 0.0034
MARC-C4-F 136 0.0031
Hand design FPGA 51.4 0.0082
MARC-Ropt-A 27.6 0.0152
MARC-C1-A 1.47 0.2863
MARC-C2-A 1.11 0.3808
MARC-C4-A 1.17 0.3608
Hand design ASIC 0.422 1.0000

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