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International Journal of Reconfigurable Computing
Volume 2012, Article ID 578363, 10 pages
http://dx.doi.org/10.1155/2012/578363
Research Article

QoSS Hierarchical NoC-Based Architecture for MPSoC Dynamic Protection

1Microelectronics Laboratory, Polytechnic School, University of São Paulo, 05508900 São Paulo, SP, Brazil
2Federal Institute of Education, Science and Technology of São Paulo, 01109010 São Paulo, SP, Brazil
3Information and Communication Science and Technology Laboratory, University of South Brittanny, 56100 Lorient, France

Received 20 January 2012; Revised 15 May 2012; Accepted 15 May 2012

Academic Editor: Elmar Melcher

Copyright © 2012 Johanna Sepulveda et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Linked References

  1. M. Loghi, F. Angiolini, D. Bertozzi, L. Benini, and R. Zafalon, “Analyzing on-chip communication in a MPSoC environment,” in Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE '04), pp. 752–757, February 2004. View at Publisher · View at Google Scholar · View at Scopus
  2. L. Benini, “Application specific NoC design,” in Proceedings of the Design, Automation and Test in Europe (DATE '06), vol. 1, pp. 1–5, March 2006. View at Scopus
  3. P. Kocher, R. Lee, G. McGraw, A. Raghunathan, and S. Ravi, “Security as a new dimension in embedded system design,” in Proceedings of the 41st Design Automation Conference (DAC '04), pp. 753–760, June 2004. View at Scopus
  4. McAfee, “Annual report 2011,” http://www.mcafee.com/.
  5. J. Sepulveda, G. Gogniat, J. C. Wang, and M. Strum, “Dynamic NoC-Based architecture for MPSoC security implementation,” in Proceedings of the 24th Symposium on Integrated Circuits and Systems (SBCCI '11), pp. 197–202, 2011.
  6. C. Gebotys and Y. Zhang, “Security wrappers and power analysisforSoC technologies,” in Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES '03), pp. 162–167, 2003.
  7. U. Y. Ogras, J. Hu, and R. Marculescu, “Communication-centric SoC design for nanoscale domain,” in Proceedings of the IEEE 16th International Conference on Application-Specific Systems, Architectures, and Processors (ASAP '05), pp. 73–78, July 2005. View at Scopus
  8. L. Fiorin, C. Silvano, and M. Sami, “Security aspects in networks-on-chips: Overview and proposals for secure implementations,” in Proceedings of the 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD '07), pp. 539–542, August 2007. View at Publisher · View at Google Scholar · View at Scopus
  9. S. Evain and J. Diguet, “From NoC security analysis to designsolutions,” in Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE '06), 2006.
  10. L. Fiorin, S. Lukovic, and G. Palermo, “Implementation of a reconfigurable data protection module for NoC-based MPSoCs,” in Proceedings od the 22nd IEEE International Parallel and Distributed Processing Symposium (IPDPS '08), April 2008. View at Publisher · View at Google Scholar · View at Scopus
  11. L. Fiorin, G. Palermo, S. Lukovic, V. Catalano, and C. Silvano, “Secure memory accesses on networks-on-chip,” IEEE Transactions on Computers, vol. 57, no. 9, pp. 1216–1229, 2008. View at Publisher · View at Google Scholar · View at Scopus
  12. S. Lukovic and N. Christianos, “Enhancing network-on-chip components to support security of processing elements,” in Proceedings of the 5th Workshop on Embedded Systems Security, (WESS '10), October 2010. View at Publisher · View at Google Scholar · View at Scopus
  13. C. Irvine and T. Levin, “Security as a dimension of quality of service in active service environments,” in Proceedings of the 3rd Annual International Workshop on Active Middleware Services, 2001.
  14. J. Sepulveda, G. Gogniat, R. Pires, C. Pedraza, W. Chau, and M. Strum, “Multi-objective artificial immune algorithm for security-constrained multi-application NoC mapping,” in Proceedings of the Genetic and Evolutionary Computation Conference, 2012.
  15. B. Grot, J. Hestness, S. Keckler, and O. Multu, “Kilo-NoC: a heterogeneous network-on-chip architecture for scalability and service guarantees,” in Proceedings of the 38th International Symposium on Computer Architecture, 2012.
  16. M. Winter, S. Prusseit, and G. P. Fettweis, “Hierarchical routing architectures in clustered 2D-mesh networks-on-chip,” in Proceedings of the International SoC Design Conference (ISOCC '10), pp. 388–391, kor, November 2010. View at Publisher · View at Google Scholar · View at Scopus
  17. MiBench Version 1.0., http://www.eecs.umich.edu/mibench/.