Dynamic Circuit Specialisation for Key-Based Encryption Algorithms and DNA Alignment

Table 4

The reconfiguration time, using shift register LUT reconfiguration in the RTR aligner.

PEs	Clock cycles	Theoretical (𝜇s)	Measured (𝜇s)
5	1440	27.91	29.15
10	2880	56.78	59.93
15	4320	84.18	88.93
20	5760	112.31	118.94
25	7200	142.68	151.13
30	8640	172.04	182.23
35	10080	199.83	211.93