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International Journal of Reconfigurable Computing
Volume 2012, Article ID 786205, 17 pages
http://dx.doi.org/10.1155/2012/786205
Research Article

An Optimization-Based Reconfigurable Design for a 6-Bit 11-MHz Parallel Pipeline ADC with Double-Sampling S&H

Laboratory of Integrable Systems (LSI), Polytechnic School, University of São Paulo, 05403-900 São Paulo, SP, Brazil

Received 17 February 2012; Accepted 22 May 2012

Academic Editor: Alisson Brito

Copyright © 2012 Wilmar Carvajal and Wilhelmus Van Noije. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

How to Cite this Article

Wilmar Carvajal and Wilhelmus Van Noije, “An Optimization-Based Reconfigurable Design for a 6-Bit 11-MHz Parallel Pipeline ADC with Double-Sampling S&H,” International Journal of Reconfigurable Computing, vol. 2012, Article ID 786205, 17 pages, 2012. https://doi.org/10.1155/2012/786205.