Open SystemC Simulator with Support for Power Gating Design

<table class="table-group" width="800px"><tr class="fig-image" id="a"><td><img alt="793190.fig.009a" src="https://static.hindawi.com/articles/ijrc/volume-2012/793190/figures/793190.fig.009a.jpg"/></td></tr><tr class="fig-caption"><td align="center"><table><tr><td><b>(a) </b> Without power gate design</td></tr></table></td></tr><tr class="fig-image" id="b"><td><img alt="793190.fig.009b" src="https://static.hindawi.com/articles/ijrc/volume-2012/793190/figures/793190.fig.009b.jpg"/></td></tr><tr class="fig-caption"><td align="center"><table><tr><td><b>(b) </b>With power gate design</td></tr></table></td></tr></table>

International Journal of Reconfigurable Computing

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Figure 9

Figure 9: Open SystemC Simulator with Support for Power Gating Design 