International Journal of Reconfigurable Computing / 2012 / Article / Tab 3

Research Article

Redsharc: A Programming Model and On-Chip Network for Multi-Core Systems on a Programmable Chip

Table 3

BSN latency and bandwidth for each block type with 100 Mhz BSN clock.

Block type 32 b data width 1024 b data width

Local 2 cc (200 MB/s) 2 cc (6400 MB/s)
Remote 16 cc (25 MB/s) 47 cc (272 MB/s)
Off-chip 25 cc (16 MB/s) 56 cc (228 MB/s)

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