Research Article

An Impulse-C Hardware Accelerator for Packet Classification Based on Fine/Coarse Grain Optimization

Table 3

Preprocessing phase: number of clock cycles and overall time.

Size BenchmarkAverage
ACL FW IPC
No. of cycles Time (ms) No. of cycles Time (ms) No. of cycles Time (ms) No. of cycles Time (ms)

0.1 k 382,423 2.58 362,496 2.44 391,704 2.64 378,874 2.55
1 k 3,247,248 21.87 2,808,021 18.91 3,340,964 22.50 3,132,077 21.09
5 k 15,052,497 101.3815,771,953 106.2215,218,285 102.5015,347,578.33 103.37
10 k 32,452,174 218.57 31,339,626 211.0730,663,219 206.5231,485,006.33 212.05