Analysis of Fast Radix-10 Digit Recurrence Algorithms for Fixed-Point and Floating-Point Dividers on FPGAs

Algorithm 7

Algorithm of NaN handling.

if(qNaN_𝑋∧sNaN_𝑋)∧(qNaN_𝐷∨sNaN_𝐷)then

 𝐶^′_𝑋=𝐶_𝐷,𝐶^′_𝐷=0…01

 𝑞^′_𝑋=𝑞_𝐷,𝑞^′_𝐷=0+bias=398

elseif(qNaN_𝑋∨sNaN_𝑋)then

 𝐶^′_𝑋=𝐶_𝑋,𝐶^′_𝐷=0…01

 𝑞^′_𝑋=𝑞_𝑋,𝑞^′_𝐷=0+bias=398

else // no changes

 𝐶^′_𝑋=𝐶_𝑋,𝐶^′_𝐷=𝐶_𝐷

 𝑞^′_𝑋=𝑞_𝑋,𝑞^′_𝐷=𝑞_𝐷