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International Journal of Reconfigurable Computing
Volume 2013, Article ID 496013, 12 pages
Research Article

Fully Pipelined Implementation of Tree-Search Algorithms for Vector Precoding

Department of Electronics and Computer Science, University of Mondragon, 20500 Mondragon, Spain

Received 13 February 2012; Revised 31 July 2012; Accepted 15 January 2013

Academic Editor: João Cardoso

Copyright © 2013 Maitane Barrenechea et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


The nonlinear vector precoding (VP) technique has been proven to achieve close-to-capacity performance in multiuser multiple-input multiple-output (MIMO) downlink channels. The performance benefit with respect to its linear counterparts stems from the incorporation of a perturbation signal that reduces the power of the precoded signal. The computation of this perturbation element, which is known to belong in the class of NP-hard problems, is the main aspect that hinders the hardware implementation of VP systems. To this respect, several tree-search algorithms have been proposed for the closest-point lattice search problem in VP systems hitherto. Nevertheless, the optimality of these algorithms has been assessed mainly in terms of error-rate performance and computational complexity, leaving the hardware cost of their implementation an open issue. The parallel data-processing capabilities of field-programmable gate arrays (FPGA) and the loopless nature of the proposed tree-search algorithms have enabled an efficient hardware implementation of a VP system that provides a very high data-processing throughput.