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International Journal of Reconfigurable Computing
Volume 2014, Article ID 979327, 13 pages
http://dx.doi.org/10.1155/2014/979327
Research Article

Multi-Softcore Architecture on FPGA

CES Laboratory, ENIS, University of Sfax, 3038 Sfax, Tunisia

Received 28 June 2014; Revised 29 September 2014; Accepted 15 October 2014; Published 27 November 2014

Academic Editor: Gokhan Memik

Copyright © 2014 Mouna Baklouti and Mohamed Abid. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

To meet the high performance demands of embedded multimedia applications, embedded systems are integrating multiple processing units. However, they are mostly based on custom-logic design methodology. Designing parallel multicore systems using available standards intellectual properties yet maintaining high performance is also a challenging issue. Softcore processors and field programmable gate arrays (FPGAs) are a cheap and fast option to develop and test such systems. This paper describes a FPGA-based design methodology to implement a rapid prototype of parametric multicore systems. A study of the viability of making the SoC using the NIOS II soft-processor core from Altera is also presented. The NIOS II features a general-purpose RISC CPU architecture designed to address a wide range of applications. The performance of the implemented architecture is discussed, and also some parallel applications are used for testing speedup and efficiency of the system. Experimental results demonstrate the performance of the proposed multicore system, which achieves better speedup than the GPU (29.5% faster for the FIR filter and 23.6% faster for the matrix-matrix multiplication).