Table 4: Comparison with other FPGA accelerators for 3D FDTD with boundary conditions.

MethodBoundary conditionsFPGAPerformance 
mega cell/s
Clock frequency MHzAchieved throughput (maximum bandwidth) GB/s

Work in [9]ABCn/a1,00050n/a

Work in [5]fixedXilinx Virtex-6 XC6VSX475T325100n/a

Work in [10]fixed1,82026.8 (38.6)
fixed and ABCXilinx Virtex-6 XC6VSX475T 41,19310029.9 (38.6)
ABC and PBC100n/a

This paperABC and PBCAltera Stratix-V 5SGXEA7N2F45C21,42726013.4 (25.6)

n/a: not available.