International Journal of Reconfigurable Computing / 2018 / Article / Tab 4

Research Article

RP-Ring: A Heterogeneous Multi-FPGA Accelerator

Table 4

The number of potential pipelines.

Board PipelineFrequencyGFlopsMPair/s

Zedboard8200 MHz32.9866.6
KC70532344.9 MHz227.25977.8
XUPV52224.3 MHz9.234242.9
Gemini-132 × 2266.1 MHz
Total (theory)106620.116311.3
Total (experiment)106503.513244.7

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