Research Article
Reconfigurable Network Stream Processing on Virtualized FPGA Resources
Figure 8
The proposed reconfiguration process that supports function reconfiguration in real time has the following four steps: (a) downloading partial bitstream to the backup PRR; (b) buffering the traffic; (c) updating the interconnect; (d) releasing the traffic.
(a) |
(b) |
(c) |
(d) |