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International Journal of Reconfigurable Computing
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International Journal of Reconfigurable Computing
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2019
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Article
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Tab 7
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Research Article
ViPar: High-Level Design Space Exploration for Parallel Video Processing Architectures
Table 7
Comparing HLS and hand-written VHDL implementations for video downscaler (16:1) and convolution filter.
ā
FF
LUT
BRAM_18K
HLS_video_downscaler
1362
2022
15
VHDL_video_downscaler
2052
1753
12
HLS_convolution_filter
4968
5958
9
VHDL_convolution_filter
5136
3925
9