Research Article
An FPGA-Based Hardware Accelerator for CNNs Using On-Chip Memories Only: Design and Benchmarking with Intel Movidius Neural Compute Stick
Table 9
Design portability analysis for Zynq-US+ family.
| Zynq-US+ family | Num mac. | Comb. elem. (%) | Seq. elem. (%) | BRAM (%) | LRAM (%) | DSP (%) |
| xczu3eg | 1 | 54 | <1 | 100 | 16 | 92 | 2 | 64 | <1 | 100 | 16 | 100 | 4 | 70 | <1 | 100 | 16 | 100 | 8 | — | — | — | — | — | xczu9eg | 1 | 25 | <1 | 27 | 0 | 0 | 2 | 26 | <1 | 27 | 0 | 0 | 4 | 30 | <1 | 27 | 0 | 0 | 8 | 36 | <1 | 27 | 0 | 0 |
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