As the fifth in a successful series, ReConFig'09 will provide a leading edge forum for researchers and engineers across the world to present their latest research and to discuss future research and applications. The conference seeks to promote the use of reconfigurable computing and FPGA technology for research, education, and applications, covering from hardware architectures and devices to custom computers and high-performance systems.

ReConFig'09 covers a broad spectrum of topics from hardware architectures and devices to custom computers and high-performance systems. Topics include, but not limited to:

• Models, methods, tools, and architectures for reconfigurable computing
• Compilation, simulation, debugging, synthesis, verification, and test of reconfigurable systems
• Field programmable gate arrays and other reconfigurable technologies
• Evolvable hardware and dynamic reconfiguration
• Algorithms implemented on reconfigurable hardware
• Reconfigurable computing education
• Reconfigurable computing applications

In addition to the general session, submissions are invited for the following tracks:

• High-performance reconfigurable computing
• Bioinspired and self-adaptive computing
• Reconfigurable computing for security and cryptography
• Reconfigurable computing for DSP and communications
• Multiprocessor systems and networks on chip
• Reconfiguration techniques
• Reconfigurable computing for robotics

Selection of the conference papers for inclusion in the special issue. This special issue will accept approximately 20 extended articles selected from the peer reviewed papers that have been accepted for presentation the International Conference on Reconfigurable Computing and FPGAs (ReConFig 2009, http://www.reconfig.org/) which takes place in Cancun, Mexico, December 9-11, 2009.

The special issue will be handled by the guest editors who will be in charge of:

• Considering the recommendations and prioritizations provided by the Reconfig 2009 program committee members, organizing committee members, and paper reviewers
• Coordinating peer reviews of the selected extended papers

The criteria for paper selection will be based on papers that stand out in terms of quality of the research and the presentation of the results, originality and potential scientific impact ensuring that a diverse range of topics of representative of important and growing research areas of Reconfigurable Computing and FPGAs will be covered.

Before submission, authors should carefully read over the journal's Author Guidelines, which are located at http://www.hindawi.com/journals/ijrc/guidelines/. Prospective authors should submit an electronic copy of their complete manuscript through the journal Manuscript Tracking System at http://mts.hindawi.com/, according to the following timetable: