Research Article | Open Access
Handing Tolerance Problem in Fault Diagnosis of Linear-Analogue Circuits with Accurate Statistics Approach
The tolerance handling in analogue fault diagnosis is a challenging problem. Although lots of methods are effective for fault diagnosis, it is hard to apply them to the case with tolerance influence. In this paper, a robust statistics-based approach is introduced for tolerance-influencing fault diagnosis. The advantage of this proposed method is that it can accurately locate the data fusion among fault states. In addition, the results in analogue benchmark (e.g., linear voltage divider circuit) indicate that it is effective in fault diagnosis in accordance with given fault diagnostic requirements (e.g., fault diagnosis error, fault detection rate).
The tolerance is one of the most common problems in the production of analogue circuits [1, 2]. It often introduces a variable parameter range around nominal value for the circuit components, which lead to the variation of circuit response from one circuit board to another. It is also a challenging problem in the fault diagnosis so that some widely used fault diagnosis methods (e.g., the traditional ICT technique in ) fail. Therefore, there is still an urgent need to find an accurate but simple method handling tolerance.
In the past, some scientists often accept an unauthenticated assumption of nominal distribution to circuit response (voltage, current, and other fault signatures) according to the statement in . However, such statistical distribution assumption has not been proved ever, which weaken the theoretical basis of corresponding methods. Besides, it might lead to inaccurate fault diagnosis according to Figure 1(a). Other scientists got around the mathematical analysis of tolerance influence. Instead, an intellectual algorithm (e.g., Support Vector Machine (SVM) is often used for tolerance-influencing diagnosis [5–8]. The weakness of this thinking includes 2 aspects: that how the fault diagnosis should be trusted cannot be evaluated when different training samples introduce different data-fusion estimation (Figure 1(b)); the characteristic vector used for fault classification is often too complex to construct.
To solve these questions as above, this paper presents a robust statistics-based method for the fault diagnosis. The robustness means the statistical fault modelling is established according to the strong support of theories. Thus, the capabilities of fault diagnosis for an analogue circuit can be estimated in a trustable manner. Furthermore, there are at least 2 more advantages: the corresponding fault signature is simple to calculate in the process of circuit diagnosis [9, 10]; the fault diagnosis error limit can be found to benefit us in the fault diagnosis with given requirement (e.g., the fault diagnosis error, fault detection rate).
The rest of paper is organized as follows. At first, in the last part of this section, all of critical problems in fault diagnosis, including the fault detection, identification, and diagnosis error control, are integrated in the working flow of circuit diagnosis as shown in Figure 2. Then, Section 2 establishes the bases of statistical analysis in linear analogue-circuit involved in fault diagnosis: the assessment of fault diagnosis abilities for a designed analogue circuit with a given tolerance; the estimation of fault diagnosis error limit; test-nodes selection and design reducing the test measurement with specific diagnostic requirements. Section 3 tests the effectiveness of theories of Section 2 in some representative linear circuits. In Section 4, we draw the corresponding comments and conclusions.
2. Method of Handling Tolerance in Fault Diagnosis
2.1. Fundamental Theory to Understand Tolerance Influence
Without loss of generality, assume that the circuit under test (CUT) in Figure 3 has accessible internal test nodes , and external independent current stimuli and . Then in the tolerance-free condition, its nodal voltage can be given according to Lemma 1.
Lemma 1. A linear circuit in Figure 3 has the accessible internal test nodes (e.g., , ) with two given current stimuli and ; then its nodal voltage can be solved as where the matrix is a diagonal matrix, in which the th diagonal element is the sum of conductivities in the neighbourhood of node , while matrix is adjacent matrix in which the element is nonzero if there are connections on the corresponding node-pair.
Proof. At first, suppose that there is a vertex with nodal voltage , which is measured to a convenient point (e.g., the common ground), then Kirchhoffs’ law of current states that the total current flowing into or out of this vertex is zero, which implies that
Equation (2) is expressed in a matrix form , where the matrix is a diagonal matrix, whose th element is sum of conductivities in the neighbourhood of node , while matrix is adjacent matrix in which the element is nonzero if there are connections on the node pairs. Furthermore, the element of on a test node is established in one of 3 cases: , if and ; , if and ; , if and .
Lemma 1 indicates that if we set , then is an equation solving the nodal voltage in a tolerance-free circuit.
When the linear-analogue circuits are designed with tolerance, the tolerance influence can be modelled as disturbance on , , and ; then Theorem 2 is established.
Theorem 2. Suppose that a matrix of represents the influence of tolerance on the matrix , an analogue circuit designed with tolerance can be expressed by a linear equation ; therefore, and is a vector, in which each element follows Gaussian distribution if the element of follows the normal distribution.
Proof. In accordance with Lemma 1, = Kronecker and if the independent current sources are fixed. Then, ; thus, , where is a unit matrix.
It is obvious that the element in matrix can be linearly expressed by the elements of matrix ; then it follows Gaussian Distribution if the element of follows a normal distribution.
In accordance with theTheorem 2, a nodal voltage is a normal random variable with the influence of tolerance, on the condition that a fault-free component in the circuit is considered as normal production [11, 12]. Furthermore, in general case, the value of is complex, where its real part is while its imaginary part is . Thus, the variable conforms to bivariate normal distribution.
2.2. Fault Statistic Model for Fault Diagnosis
Given a linear CUT network composed of an independent voltage source and components, the parameters of all nonfaulty components are their nominal values. However, there are potential faults in this circuit and the fault state set is given as , in which is the fault-free state while others show that the corresponding th component is faulty.
Furthermore, the test-nodes set (accessible nodes to voltage measurement) is set as . Meanwhile, the normal distribution solution is held for the nodal voltage in any fault state, although the corresponding means and variances should be different.
With the superposition theorem, a nodal voltage is the algebraic sum of the following two components: the first component is caused by while the is assumed to be short; the second component is led by when the is short. Thus, the total voltages are:
Here, is the transmission factor between voltage source and the voltage on test node , and is the transmission factor between and the voltage on test node .
If the parameter of is fault-free, then we get
Eliminating in (3), we get
The FSV was proposed in [14, 15] to solve the soft faults problem in linear tolerance-free circuit. The reasons that the fault slope value (FSV) is chosen for fault diagnosis as follows: Considering that the hard fault (open or short circuit) is a special case with very large or small component resistance in analogue circuit, fault slope value (FSV) can be a general fault signature to all fault patterns in accordance with the theoretical derivation; the calculation of FSV is from the simple voltage measurement and it is not time-consuming in practice. In this paper, its statistical feature can be obtained according to Theorem 3, when the value of and follows normal distribution according to Theorem 2.
Theorem 3. Fault slope value (FSV) is a random variable T that follows the nominal ratio distribution (the ratio of two normal random variables) according to Theorem 2 and its definition in (6). Such nominal ratio distribution can be established as based on , where L(p,q;p) is the standard bivariate normal integral shown as follows:
where , , and are shown as follows:
In practice, there exist lots of numerical algorithms for estimation of the ratio of two normal random variables. For instance, the computation in  could reduce a maximum error to , which guarantees the accurate FSV value estimation. In particular, when , is small enough, the cumulative distribution function (CDF) for FSV is further simplified to where is the CDF of a standard normal distribution.
The derivation () can be developed in a similar way; then the estimated FSV can be located in according to its upper and lower tolerance limits of a standard normal distribution: if upper confidence limit for is set at , then is the lower confidence limit for , so that the value of can be obtained through . Here, and .
2.3. Fault Diagnosis Based on Normal Ratio Distribution
2.3.1. Fault Diagnosis with Fault Diagnosis Error Requirement
In a circuit under test (CUT), the estimated range of FSV is represented in Table 1. Here, the fault-states set is , , and is the number of fault states in analogue-circuit. The test-nodes set is , , with which a test-nodes pair () is represented by . Furthermore, the estimated parametric range of FSV for fault state on the test-nodes pair is , where and .
The determination of and is related to the fault diagnosis error determined by normal ratio distribution through Theorem 4. In this theorem, the fault diagnosis error limit is calculated through the data fusion probability among different circuit fault states.
Theorem 4. A fault can be located with a fault diagnosis error <100(2α)%, if and only if there exists at least one test-node pair, on which the corresponding values of SFV can be distinguished from all other fault/fault-free states with the 100(1 − α)% confidence limit configuration in Figure 5.
Proof. Without loss of generality, in Figure 5(a), on the condition that upper confidence limit is for fault state and lower confidence limit is for , , it is obvious that the integration of CDFs in Figure 5 is less than the CDFs integration between threshold and , meaning that the fault diagnosis error of is <100(2α)%.
Once the required fault diagnosis error is satisfied with a given tolerance, such tolerance is less than the tolerance limit value, which is defined as (the worst component tolerance) in Definition 5.
Definition 5. Given a fault diagnosis error requirement, the worst component tolerance surely leads to the data fusion pattern in Figure 5(b), where the confidence limit of FSV estimation is set at , for each fault state.
Then based on the corresponding value of FSV in Table 1, the fault diagnosis on a set of parametric fault is categorized into fault detection and isolation: a fault can be detected if there is at least one test-node pair, on which the corresponding value of FSV owns no parametric overlaps with the fault-free state. Meanwhile, a fault can be isolated meaning that this fault state can be distinguished from all other fault states because of no intersection of FSVs.
To be convenient in the following statement, we define where ; where , , .
Then the result of fault diagnosis is measured through fault detection rate (FDR), fault isolation rate (FIR) as follows.(1)Fault detection rate (FDR): the ratio of fault states that can be detected in a given fault states set: where the number of fault states is .(2)Fault isolation rate (FIR): the ratio of fault states pair can be isolated based on a given fault states pair set: where the maximum number of isolated fault states pair is .
2.3.2. Fault Parameter Identification Based on Normal Ratio Distribution
The basic idea of statistics approach in fault diagnosis can also help us identify fault parameter. In this paper, the fault parameter identification needs the determination of the diagnostic fault parameter border, which decide how small the alteration of component parameter could be distinguished from fault-free state. As for the diagnostic fault parameter border, Theorems 6 and 7 are proposed.
Theorem 6. In the single fault case, there is a parameter range or in which all the fault states involved in these altered parameters can be detected. Here, is the nominal value of the component, and and or is called as the diagnostic fault parameter border.
Proof. In the single fault case, the variation in corresponding element of causes a monotonous variation to the mean of random variable in matrix according to the linear expression . Thus, once a parameter or () causes the altered distribution in fault state can be separated in a long enough distance from the distribution in the fault-free state . Then, the fault states related to fault parameter or can all be detected through the measurement of or the corresponding value of SFV on a test-node pair; that is, the diagnostic fault border is .
Theorem 7. Assume that there are potential -fault components in a linear-analogue circuit, there is definitely a parameter range set, in which all fault states caused by these altered parameters can be diagnosed in accordance with the FSV value.
Proof. Assume that is the nominal value of the component, and and or is the diagnostic fault parameter border shown in Theorem 6. It is not hard to find that Theorem 7 is correct when ( is the number of fault component). Then when Theorem 7 is established when , if one more fault occurs, there exists a parameter or causing the altered distribution in fault state which can be distinguishable from the distribution in the fault state . The corresponding diagnostic parameter range from to is , . Then, the diagnostic parameter range set for fault state is . Hence, as for all fault states, it is given as .
Furthermore, Theorem 8 gives the determination of fault diagnostic resolution, which means that the minimum component parameter variation that can lead to distinguishable response for fault identification.
Theorem 8. Assume that the value of is the nominal value of a component in the linear-analogue circuit, and the diagnostic fault parameter border is and . Then, the value of (or ) is almost an effective fault diagnosis resolution, with which a pair of faults corresponding to the component parameter (or ) can be distinguished from each other as long as (or ).Then these two faults parameters , can be identified according to the FSV values.
Proof. According to the linear expression of , and the assumption that altered component parameter is continuous and monotonous, then the value of FSV is continuous and monotonous. Thus, if a fault state with fault parameter or can be distinguished from the fault-free state,the value of is the fault resolution for the fault identification based on FSV values, and it indicate that the parametric alteration on the same component can be distinguished with at least b-a parametric distance.
2.3.3. Test-Nodes Set Selection Based on FSV Range
The optimum test-nodes set selection is also a critical problem in fault diagnosis that can be solved on the basis of the result of accurate statistics. Here, according to the statistical result, a bipartite decision network including fault states nodes and accessible test-nodes pair vertices is established, in which the connections from a test-nodes pair node to a fault state pair node represent a success of fault isolation or detection (there are no intersection of interval estimation of FSVs between and ).
A simple example of bipartite decision network is shown in its matrix form of (12); there are 4 potential test-nodes pair vertices , , , and while 4 fault pair vertices , , , and are given in corresponding rows. The first element in the matrix is 1 means the connections exist from to . Thus, the fault state can be distinguishable from fault-free state :
Once the bipartite decision network is established, the proposed process of test-nodes selection is as follows.(1)The target test-nodes set is initialized to a null set.(2)The degree of all test-node pair vertexes are calculated, and then the most likely selected test node corresponding to the test-node vertex with the largest value of is selected.(3)All the connections from the selected test-node pair vertexes to the fault states pair vertexes should be eliminated. Then, the corresponding fault states pair is set be diagnosed.(4)If there are fault state pairs having not been diagnosed, update the values of degree and select more test-nodes in the next round.(5)The algorithm ends up with the condition that there are no connections in the bipartite network.
3. Computational Examples
In this section, there are two examples to validate the proposed fault diagnosis based on the accurate statistical analysis of FSV. At first, the simulations are implemented with PSPICE and R language programming on the respective software platform (Orcad 10.5 and RStudio) to determinate the proper test-nodes set for fault diagnosis. Both of them are executed with a given requirement of , . Furthermore, we test the corresponding result of fault diagnosis in actual circuit.
Since the hard faults (catastrophic ones) can be thought of as a case of soft faults and the single fault in circuit is the most probable occurrence, the discussions in these examples focus on the case of single soft fault.
The first example is shown in Figure 6. This example is used to demonstrate the critical results of proposed method for fault diagnosis based on statistical analysis, and the soft faults are set according to the same fault states of : the parameter of faulty resistance drifts toward 8 K, varying more than of its nominal value. Thus, there exist 10 soft faults with a fault states set description , , while test-nodes set is shown in the Figure 6. Moreover, the requirement of the fault detection rate (FDR) and fault isolation rate (FIR) is set ≥90%, and the expected fault detection (isolation) error is set less than .
Based on Theorem 4, if the expected fault detection (isolation) error is set less than , the interval estimation of FSV is given with a confidence limit requirement in Theorem 3. The corresponding result is shown in Table 2. Then if we use (12)-(13), it is not hard to find the value of , . Thus, the value of FDR in (14) is . However, . Then, the fault isolation rate (FIR) is . Eventually, the requirement of FIR, FDR is also satisfied.
These fault isolation or detection result can be coded into a bipartite network. To be convenient, it can be expressed as a matrix shown in (17). Then, with the calculation and updating of test-nodes pair vertex degree in Table 3, it is simple to select the test-nodes set to meet the requirement of fault diagnosis:
In this paper, the simulation of the circuit in Figure 6 also points out that how the method which is dependent on the assumed normal distribution brings deviation of estimated FSV, compared with the proposed method result. In fact, in Table 4, the inaccurate estimation of FSV from assumed normal distribution (NDS) leads to some loss of FSV range in all possible given tolerance when compared with that in NQS-based estimation (proposed method). For instance, when the tolerance is , and the corresponding FSV calculated from voltage measurement (on the test-nodes of , ) is larger than 4.00 (), the corresponding fault states are undiagnosed case in the point of view of NDS. Furthermore, the difference of FSV range can be found in all common tolerance, and it deteriorates with increasing tolerance value. For example, when the tolerance is , the estimated range of FSV based on NQS for fault state is , while the estimation of FSV based on NDS is . Then, an index namely missed faults rate (MFR) is given by for measuring the influence of deviation of estimated FSV on the fault diagnosis. Finally, the value of max missed faults rate (MMFR) for each tolerance (column) is listed on the bottom of Table 4.
Up to now, the simulation-based illustrations in the linear circuits of Figure 6(a) have shown the critical result of fault diagnosis in Table 3. After that, we test the effectiveness of solution of Table 3 in an actual measurement. In this test, an investigated fault is set as the fault value of 8 K, while all other fault-free components are randomly selected from a set of actual components set with tolerance of . The corresponding circuit diagnosis result is shown in Table 5.
|The fault state is ambiguous to .|
According to Table 5, these results of the statistics-based method are preserved in the actual diagnosis: the optimum test-nodes set for fault diagnosis is according to both the simulation result in Table 2 and the actual test of circuit diagnosis in Table 5; the required fault detection/isolation rate is satisfied (≥90%) in both the simulation and practical measurements; the fault state is ambiguous to. with the fault signature of FSV according to Table 2, and this solution is observed in the actual circuit test.
The proposed fault diagnosis method is also effective in the analogue circuit composed of linear amplifiers. In this case, the tolerance is . And the nominal components values of are 10 K and nF, nF, nF, nF. Investigated fault states include : K, K, K and nF, nF, nF.
With the proposed statistics-based method, the estimations of FSV value have been shown in Table 6. Clearly, it gives us these solutions for fault diagnosis: the test-nodes set is , or , ; and the fault detection rate (FDR) can be , while the fault isolation rate is (FIR) . All of these solutions will be testified in a tolerance-influenced actual circuit. Here, such circuit is constructed in Figure 7(b), where the external stimulus is a sin-wave with 1 kHz frequency and 1.0 V amplitude value. Therefore, in a practical test, the corresponding FSV values from the measurements on test-nodes pair ( or ) are shown in Table 7, based on the voltage measurement on , , . The corresponding fault diagnosis result tell us the following: the proposed spastics approach can give us the correct and effective test-nodes selection for fault diagnosis; it determines what the final fault diagnosis result (fault isolation/detection) is in the tolerance consideration, which benefit us in the fault diagnosis result prediction for an actual circuit test with a required fault detection rate/fault isolation rate.
This paper builds a statistics-based viewpoint in order to solve the tolerance problem in accordance with given fault diagnostic requirements. Based on this point of view, the relationship between tolerance limit and fault diagnosis error limit can be discovered in this paper. And in the process of fault diagnosis, the accurate statistical feature discussion let us know more accurate response varying range, which assure that the measurement reduction (test-nodes selection) and fault parameter identification can avoid incorrectness in fault diagnosis applications. As a matter of fact, all of these advantages have been analysed and tested in the experiment of linear-circuit benchmarks.
This is an acute view to handle the tolerance problem in analogue circuit diagnostic design and fault diagnosis. Furthermore, it can be generalized in the following cases. Although the hard fault is not the main focus in this paper, the proposed method could be generalized to hard fault case. The discussion of accurate analysis on the SFV can be used in the nonlinear circuit cases, as long as the linearwise segments modelling can be established. In this case, because the operating point change is a polyline in the nodal voltage plane, the SFV near the operating point can also be considered the effective feature for the fault diagnosis. All of these discussions should be carried in further research.
First and foremost, one of the authors would like to show my sincere thanks to these colleagues in my lab, such as Wei-min Xian, Jin-Yu Zhou, and Wei Li, who give me sound pieces of advice in amendments of words and pictures as well as corresponding data. Then he shall extend his thanks to Vice Professor Long for all his kindness, which has also helped him to develop the fundamental academic competence in the programming of R code and Spice simulation. At last, this work was supported in part by the National Natural Science Foundation of China under Grants nos. 61071029, 60934002, 61271035, and 61201009, and by Ministry Level Pre-Research Foundation of China under Grant no. 9140A17060411DZ0205.
- T. Y. Hong and H. Y. Yi Gang, “A new fault dictionary method for fault diagnosis of analogue circuits,” Microelectronics, vol. 31, pp. 252–254, 2001.
- Z. Czaja and R. Zielonko, “Fault diagnosis in electronic circuits based on bilinear transformation in 3-D and 4-D spaces,” IEEE Transactions on Instrumentation and Measurement, vol. 52, no. 1, pp. 97–102, 2003.
- P. M. Lin and Y. S. Elcherif, “Analogue circuits fault dictionary. New approaches and implementation,” International Journal of Circuit Theory and Applications, vol. 13, no. 2, pp. 149–172, 1985.
- J. Huanca and R. Spence, “New statistical algorithm for fault location in toleranced analogue circuits,” IEE Proceedings G, vol. 130, no. 6, pp. 243–251, 1983.
- D. Grzechca and J. Rutkowski, “Fault diagnosis in analog electronic circuits: the SVM approach,” Metrology and Measurement Systems, vol. 4, pp. 583–589, 2009.
- R. Sałat and S. Osowski, “Support Vector Machine for soft fault location in electrical circuits,” Journal of Intelligent and Fuzzy Systems, vol. 22, no. 1, pp. 21–31, 2011.
- F. Aminian, “Fault diagnosis of nonlinear analog circuits using neural networks with wavelet and fourier transforms as preprocessors,” Journal of Electronic Testing, vol. 17, no. 6, pp. 471–481, 2001.
- B. Long, S. Tian, and H. Wang, “Diagnostics of filtered analogue circuits with tolerance based on LS-SVM using frequency features,” Journal of Electronic Testing, vol. 28, pp. 291–300, 2012.
- W. Peng and Y. Shiyuan, “A soft fault dictionary method for analogue circuit diagnosis based on slope fault mode,” IEEE Transactions on Automatic Control, vol. 22, pp. 1–23, 2006.
- L. Zhou, Y. Shi, J. Tang, and Y. Li, “Soft fault diagnosis in analogue circuit based on fuzzy and direction vector,” Metrology and Measurement Systems, vol. 16, pp. 61–75, 2009.
- K. C. Varghese, J. Hywel Williams, and D. R. Towill, “Simplified ATPG and analog fault location via a clustering and separability technique,” IEEE Transactions on Circuits and Systems, vol. 26, no. 7, pp. 496–505, 1979.
- S. Freeman, “Optimum fault isolation by statistical inference,” IEEE Transactions on Circuits and Systems, vol. 26, no. 7, pp. 505–512, 1979.
- W. H. Hayt Jr., J. E. Kemmerly, and S. M. Durbin, Engineering Circuit Analysis, McGraw-Hill, New York, NY, USA, 7th edition, 2007.
- C. Yang, S. Tian, B. Long, and F. Chen, “Methods of handling the tolerance and test-point selection problem for analog-circuit fault diagnosis,” IEEE Transactions on Instrumentation and Measurement, vol. 60, no. 1, pp. 176–185, 2011.
- W. Peng and Y. Shiyuan, “Circuit tests based on the linear relationships between changes in node voltages,” Journal of Tsinghua University, vol. 47, pp. 1245–1248, 2007 (Chinese).
- D. V. Hinkley, “On the ratio of two correlated normal random variables,” Biometrika, vol. 56, pp. 635–639, 1969.
- Z. Drezner and G. O. Wesolowsky, “On the computation of the bivariate normal integral,” Journal of Statistical Computation and Simulation, vol. 35, no. 1-2, pp. 101–107, 1990.
Copyright © 2013 Xin Gao et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.