Wu’s Characteristic Set Method for SystemVerilog Assertions Verification

Table 1

Polynomial representation for arithmetic and logical units.

Arithmetic or logical operation	Polynomial set representation
𝑦=𝑎+𝑏	𝑦−𝑎−𝑏
𝑦=𝑎−𝑏	𝑦−𝑎+𝑏
𝑦=𝑎∗𝑏	𝑦−𝑎∗𝑏
𝑦=𝑎/𝑏	𝑦∗𝑏−𝑎
𝑦=𝐍𝐎𝐓𝑥	1−𝑥−𝑦
𝑦=𝑥1𝐀𝐍𝐃𝑥2	𝑥1∗𝑥2−𝑦
𝑦=𝑥1𝐎𝐑𝑥2	𝑥1+𝑥2−𝑥1∗𝑥2−𝑦