A plug-in hybrid electric vehicles (PHEV) charger adapter consists of an AC/DC power factor correction (PFC) circuit accompanied by a full-bridge isolated DC/DC converter. This paper introduces an efficient two-stage charger topology with an improved PFC rectifier as front-end and a high-frequency zero voltage switching (ZVS). Current switching (ZCS) DC/DC converter is the second part. The front-end converter is chosen as bridgeless interleaved (BLIL) boost converter, as it provides the advantages like lessened input current ripple, capacitor voltage ripple, and electromagnetic interference. Resettable integrator (RI) control technique is employed for PFC and DC voltage regulation. The controller achieves nonlinear switching converter control and makes it more resilient with the faster transient response and input noise rejection. The second stage incorporates a resonant circuit, which helps in achieving ZVS/ZCS for inverter switches and rectifier diodes. PI controller with phase shift modulator is used for second-stage converter. It improves the overall efficacy of the charger by lowering the switching losses, lowering the voltage stress on the power semiconductor devices, and reversing recovery losses of the diodes. The simulations and experimental results infer that the overall charging efficiency increases to 96.5%, which is 3% higher than the conventional two-stage approach using the interleaved converter.

1. Introduction

In order to reduce the fuel consumption and fuel emission, the world is moving towards eco-friendly vehicles, [1] namely electric vehicles (EV), hybrid electric vehicles (HEV), and PHEV. Highly efficient batteries, its fast-changing technologies, and charging infrastructure are the key sources for the electric vehicles. Battery chargers are crucial in the field of battery and electric car technology [2]. A traditional combustible engine plus an electric engine powered by a pluggable external electric source propels PHEVs [3]. In normal driving conditions, PHEVs can store enough electricity from the grid to drastically reduce their gasoline usage [4]. The recent developments in PHEV motor drive and battery charging technologies have increased the demand for PHEV vehicles in the market. Researchers focus on improving the same to speed up the commercialization of the vehicle in the market.

Batteries [5] such as nickel metal hybrid, lithium polymer, and lithium-ion are predominantly used in electric vehicles for its best efficiency, safety, energy density, and cost factor. At all power levels, a battery charger can allow unidirectional or bidirectional power transfer. The bidirectional power flow [6] includes a vehicle-to-grid (V2G) mode to the grid-to-vehicle interface (G2V). In a utility-connected microgrid, a battery charger configuration for PHEV applications using a back-to-back (B2B) converter is also proposed [7]. Depending on the vehicle’s power requirements, this proposed structure can operate in four different modes: grid-to-vehicle (G2V), microgrid-to-vehicle (M2V), vehicle-to-grid (V2G), and vehicle-to-microgrid (V2M).

The IEC-62196 specifies the general parameters of the charging process [4], and therefore, how energy is delivered. In order to charge the automobiles, users have four options. They are slow charging, semi-fast charging, fast charging, and ultrafast charging. Two different types of chargers for charging the battery are considered, namely high-speed charger and on-board charger [8]. PHEV applications support on-board charger for residential charging. From a 230 V supply, 3.3 kW on-board charger can charge a 16 kWh exhausted battery pack in around 4 hours.

The charger architectures [8] are broadly classified as single-stage and two-stage chargers. Two-stage architecture is preferred, as it gives low-frequency ripple rejection. Front part of two-stage architecture is AC-DC converter, and back end has DC/DC converter. The power architecture of a two-stage battery charger depicted in Figure 1 includes AC/DC PFC circuit accompanied by a second part isolated DC/DC converter.

A variety of PFC rectifier circuits with linear and nonlinear control methods [9] have been developed as front-end converters. A multilevel converter configuration is the viable choice if larger power ratings are required. Most commonly used topologies for the front-end converter are dual boost converter [7], bridgeless PFC converter [10], interleaved PFC boost converter [11], and phase shifted boost converter [12]. The interleaving concept reduces the current ripple at the supply end and also EMI filter requirement. On the other hand, the drawbacks of the conventional interleaved converters include increased output voltage ripple, cost, design complexity, the thermal problem due to the presence of diode bridge rectifiers, voltage and current stress on the semiconductor devices, and electromagnetic interferences (EMI).

A BLIL PFC boost converter with four-channel interleaving is considered as front-end converter, since it overcomes the drawbacks of the conventional converters. The second part of the two-stage charger is an isolated resonant DC/DC converter. Various topologies for obtaining zero voltage switching are available. Higher circulating primary winding current is one of the major downsides of the traditional isolated DC/DC converter to attain ZVS resulting in greater conductive losses of switches. Alternatively, ZVS eliminates noise and harmonics in high-frequency converters. Many topologies with soft switching technique, such as phase shifted ZVS topology [13], LLC resonant topology [14], and RCD voltage clamping [15], are reported in the literature to diminish the switching losses, voltage stress across the switches, and diode’s reverse recovery loss. The proposed second-stage resonant converter overcomes the above-mentioned losses with lesser number of components, thereby increasing the overall efficiency of the charger. Miralinaghi et al. [16] suggested scheme on operation and integration of two buck-boost converter based on a single-phase bidirectional inverter under a maximum power point trackers (MPPT) on DC distribution system. The power factor correction and grid connection fulfilment were obtained by bidirectional inverter with a full-bridge configuration. The power flow between DC bus and AC grid was controlled by an inverter control system, and it was regulated DC bus to a certain range of voltages [16].

Tran suggested scheme on operation and integration of two buck/boost converter based on a single-phase bi-directional inverter under a maximum power point trackers (MPPT) on DC distribution system. With a thin PV array, the MPPT technique was formed by two buck and boost converter, it reduced the voltage stress. The power factor correction and grid connection fulfilment were obtained by bidirectional inverter with a full-bridge configuration [17]. Miralinaghi et al. [18] suggested a scheme on soft switching charging and discharging converter with the zero-voltage discharge function. The battery voltage can be discharged by the converter until it becomes zero. In the charging operation at turn-on period, the zero voltage switching was achieved, and in discharging operation at turnoff period, the zero current switching was achieved [18]. He et al. [19]suggested scheme on single DC single source with less magnetite topologies for minimizing the power balance issues. For minimizing the zero-sequence current, a sine-triangle pulse width modulation was used. To obtain a staircase voltage waveform using power electronic switches under low-rated based on multilevel inverter concept. As that the requirement of series-connected switches increases, it depends on the number of increasing voltage level [19]. This paper introduces an efficient two-stage charger topology with improved PFC rectifier as front end with a nonlinear controller and a high-frequency ZVS-ZCS DC/DC converter as the second stage with ACM controller as displayed in Figure 2.

This article is structured in the following manner: Section 2 designates the first stage of battery charger system with nonlinear PFC algorithm and the second stage is resonant DC/DC converter explained in Section 3. The requisite designed equations of the converter and its specifications of the suggested battery charger are addressed in Section 4. The simulation results are detailed in Section 5. Finally, Section 6 carries the conclusion report based on the results obtained.

2. Front-End PFC Boost AC/DC Converter

BLIL PFC boost converter [2023] shown in Figure 2 includes four inductors (, and ), four power MOSFET’s ( to ), four diodes ( to ), and an intermediate DC link capacitor . As the term suggests, the bridge rectifier with diodes is abolished. Compared with the traditional interleaved boost converter, four channel interleaving lessened the input current ripple. The total current flowing through the inductors and will be the input current. Since the ripple current in the inductors [ and ] are now out of phase, they negate each other, thus minimizing the ripple of input current [24]. Interleaving decreases output capacitor current ripple, current stress on the devices, and, furthermore, the circuit EMI [25].

BLIL boost converter is implemented with the PFC control algorithm, which improves power factor and power quality of the input current according to IEC 61000-2-3 standard, and the load voltage is regulated to the preferred value. The PFC [26, 27] is designed in several ways, such as boundary conduction mode (BCM), continuous conduction mode (CCM), and discontinuous conduction mode (DCM). Average current mode (ACM) control is one of most commonly used methods in boost PFC converters to accomplish high power factor and minimal distortion. Any disturbance in the line voltage is compensated in the ACM control technique, increasing the output voltage’s immunity to variations in the supply line. This method drawback includes detecting input current, input voltage, output voltage, and multiplier circuit all of which add to the circuit complexity. When a transient occurs, the outer voltage loop reaction is slow, and it takes many switching cycles to achieve stability. These disadvantages are rectified by incorporating nonlinear control technique.

The BLIL boost converter considered in this work operates in CCM mode, and the control scheme incorporated is resettable integrator control technique. Resettable integrator (RI) technique [2830] shown in Figure 3 is a nonlinear technique proposed for converters operating at constant frequency. This does not require input voltage sensor, multipliers, and input current error compensator as like average current mode control. The vital advantage of this control method is that it the harmonics are removed as well as the transients are traced. The output signal is combined here until it approaches the reference signal. The converter switching frequency, , is much higher than the frequency of the input signal or the reference signal , and therefore, and can be taken as fixed value. Let be the output variable.where δ (t) is the duty cycle and is the total interval. The power device’s duty cycle is controlled when the chopped waveform equals the input reference as stated in thefollowing equation:

In different converter topologies, this control approach may be extended to leading edge and trailing edge modulation. The theoretical waveform of the control technique is depicted in Figure 4. The sensed output voltage is fed to an amplifier. The amplified error voltage is tuned by PI controller that is integrated with a resettable integrator, and for each switching cycle, a variable magnitude ramp voltage is generated. The inductor current is compared with the ramp voltage as shown in Figure 3. When the voltages are equal, the integrator resets. Therefore, the integrator resets for each switching time and the ramp voltage begins at “0” for consecutive switching period. Thus, in one switching period this discards the supply-fed disturbances and load disruptions.

3. Isolated Resonant DC/DC Converter

The PHEV charger second part consists of an isolated resonant DC/DC converter [31], which can be operated in CCM, BCM, and DCM mode. In this case, the converter is operated in DCM mode, with high switching frequency to lessen the passive components size, the ratio of transformer turns, and the current stress on primary end switches. The primary winding of the transformer is coupled to the inverter circuit as portrayed in Figure 2. The inverter switches and rectifier diode’s resonant switching are achieved by fixing the duty cycle of the lower group devices of the inverter and as 50%, while upper switches ( and ) are PWM controlled [32]. The power semiconductor devices are modelled with parasitic capacitances and parallel diodes. All the parasitic capacitances of switches and inductors are together taken in the output capacitance. Theoretical waveforms for the operation of isolated resonant DC-DC converter are shown in Figure 5.

It can be seen that the ZV switching-on and ZC switching-off is accomplished for the inverter’s lower switches, while the upper leg devices attain ZCS turnoff. The diodes in the rectifier circuit connected next to the transformer secondary will accomplish zero current turnoff. At the time instant , the power devices and are turned on and the current streams through -- primary winding of the transformer and . At time , turns off and the primary current follows an alternative path via. -parasitic capacitance of and .

The resonant inductor’s current is expressed as follows:

At the same interval, the diodes and will start conducting on the rectifier side. The direction of the secondary current through -load and is achieved. Power devices and have now attained ZCS during OFF state. At time instant , the switches and are triggered ON, and and are now reverse biased, while and are forward biased. The resonant inductor current is currently, as per the initial condition , provided by the following equation:where is the primary current of the transformer. The time instants , and are the negative equivalents of the intervals to . For the diodes on the rectifier side of the circuit ZCS turn-on and ZCS turnoff are accomplished. The isolated resonant DC/DC converter removes the need of traditional RCD voltage clamping circuit in this case, thereby reducing the total losses and enhancing the charger performance.

The full-bridge DC/DC converter control method incorporates a phase shift of lagging leg switches with respect to leading leg switches realized by conventional ACM control as shown in Figure 3. Here, the battery terminal voltage of the battery is set to the current reference and the charging graph determines the power required to charge the battery bank. Thus, the full-bridge inverter duty ratio is determined by the charging curve and the terminal voltage of the battery.

4. Design Considerations

This section discusses the presented two-stage battery charger design. The four-channel interleaving inductors of BLIL boost rectifier are designed based on the input ripple current , and it is specified aswhere is the maximum value of the input voltage, and is the switching frequency of rectifier. are boost inductors. Two inductors of equal value are connected to each phase. The duty cycle is expressed aswhere is the bus voltage of the boost converter. The output power is given asHere, is the rectifier output current. The MOSFET used in the rectifier has duty cycle , and it is expressed aswhere Vp is the input peak value. Assuming the current flowing through the inductor as sinusoidal, its expression is given as follows:where IP is the input current’s maximum value. The instantaneous current of MOSFET and its root mean square (RMS) value may be given as follows:

The duty cycle of the diode can be stated as

The instantaneous value of diode current is

RMS value of diode current can be expressed as

The output capacitor current has low (Ic-rms(low)) and high-frequency components (Ic-rms(high)) and is given as

The capacitor is expressed aswhere is the output power and is the maximum hold up time for the line frequency 50 Hz.

And thus, the voltage stress across the power devices is given as

The second-stage isolated DC/DC converter with voltage gain is formulated as follows:where is the standardized time constant and is the turn’s ratio of the transformer, and it is given as

The duty ratio for the inverter switch is set at 0.377 as it gives the optimal gain value. The turn’s ratio of the transformer is obtained as 1.326 from (19). The voltage gain ranges from 0.1 to 0.5 for different values of D, and from 0.1 to 1 has been calculated and plotted using MATLAB as shown in Figure 6. The resonant inductor value is given aswhere is the output resistance of the converter and is the switching interval. Thus, the value of is 176 μH from (20). The RMS value of current passing through the inverter switches and , , is given asand the RMS value of current through inverter switches and , , is given as

The average current through the antiparallel diodes of MOSFETs and , , is given by

The output filter capacitor value is determined using capacitor RMS current .

The critical component value for the prototype is given in Table 1.

5. Simulation Results

The simulation of the proposed charger is carried out for 300 W using PSIM. The converter is simulated under varying supply conditions. Figure 7(a) shows the simulated dynamic response of the converter when the input voltage is adjusted from 230 V to 110 V at time t = 0.48 s using conventional control technique. After two cycles of lowering the supply voltage, the input current begins to track the voltage, bringing the power factor closer to 0.9. This is due to the slow external voltage loop, which senses the change in output voltage first and then adjusts the current reference correspondingly.

The duty cycle of the switches is adjusted, resulting in the typical controller’s slow response.

Figure 7(b) illustrates that when the supply voltage is changed from 230 V to 110 V, the power factor (PF) of the input supply is closer to unity. The interleaving inductors reduce the input current ripple in the proposed BLIL converter, and it is shown in Figure 7(b). Gain of PI controller (Kp = 1; Ki = 33.33) evaluated for PFC with input variations for predicting the performance of RI. It is obvious that the input power factor remains 0.99 for both the cases, in spite of the change in input voltage. Here, the input current traces the instantaneous value of input voltage very fast, and hence, Figure 7 shows a very good power factor with the proposed controller.

The output voltage and output current regulations are observed by introducing a step change in load at . Figure 8(a) shows the response of the output voltage when a positive and negative step load change is introduced at time t = 0.38, respectively. It takes more than 4 cycles (t > 0.08 s) to attain the steady-state condition. The output voltage and output current regulations of RI controller are observed by introducing a step change in load at . A positive step load change (300 W to 350 W) and a negative load change (300 W to 250 W) are introduced at as shown in Figures 8(b) and 8(c). The controller rejects the disturbances in one switching cycle, which eliminates the overshoot and undershoot of voltage across the device.

For the second-stage converter, the trailing edge gating pulses and with a duty cycle of 37.77% are given to the upper pair of switches and . The gating pulses for and is fixed with 50% duty cycle.

The inverter’s ZVS and ZCS turn-on and turnoff, as well as the converter side diodes’ ZCS turn-on and turnoff, are accomplished. This rectifies a 300 V voltage and conducts it to the load, where 1 A is the current through the diode.

6. Hardware Results

The prototype feeding the resistive load shown in Figure 9 is designed and tested for 300 W. For the front-end converter, ferrite core inductors of 5.8 mH are connected with 600 V, 99 mΩ Rdson MOSFET for each channel of BLIL boost PFC converter. A 600 V and 6 A silicon carbide diodes are chosen as fast diodes. A resettable integrator PFC controller using IR1150 is used to enhance the PF on the supply side, and UC2895 IC is used as phase shift controller on DC/DC converter. MOSFETs with 600 V, 80 mΩ Rdson, 450 pF parasitic capacitance, are selected as switches for the inverter in the second stage and 400 V/47 μF capacitor for filtering output current ripples.

The converter is tested for (230–110) Vrms under variable load conditions. The waveforms shown in Figures 10(a) and 10(b) are observed on the input side for 230 Vrms and 110 Vrms, respectively, which depicts the input power factor closer to unity. Harmonic spectra of the input current waveform are shown in Figure 10(c), which illustrates that the THD is less than 5% at 110 V input, which is required for PHEV battery chargers to satisfy the IEC standard 61000 3-2 class D requirements.

The inverter gating pulses with duty cycle 37% for switches ( and ) and 50% for the switches ( and ) is observed in Figure 11(a). The DC/DC converter waveforms are shown for variable load conditions, focussing that the soft switching can be achieved. The input voltage with 136 V peak to peak for 100 W, appearing across the transformer primary winding, is shown Figure 11(b).

From the waveform, the passive interval (voltage zero instant) in DCM mode can also be observed. ZCS turn-on and turnoff can be attained for the diode , which is depicted in Figure 11(c). The DC output voltage 294 V and output current 0.991 A obtained from the diode bridge rectifier is shown in Figure 12(a).

7. Comparison

The proposed topology is compared with the existing front-end converter topology controlled by conventional ACM technique in terms of THD, semiconductor loss distribution, and overall efficacy of the charger system.

The loss distribution for interleaved boost and BLIL boost converter is presented in Figure 12(b) for the following operating conditions: , , switching frequency (fs) = 80 kHz, and output power . Conduction losses, switching losses, , and gate charge losses are considered for MOSFET. As SiC diodes are chosen, reverse recovery losses are negligible. The presence of bridge rectifier in interleaved boost converter contributes large portion of loss (approximately 3 W). From the Figure 12(b), total device losses of BLIL converter have lower losses (∼3.9 W) when compared to interleaved boost converter. Moreover, the second-stage converter has soft switching achieved for FETs and diodes. Hence, the loss contribution of DC/DC converter is comparatively less compared to conventional DC/DC converter resulting in highly efficient battery charger.

THD of the input current from Figure 13(a) clearly indicates that it complies with IEC standard 61000 3-2 class D limit when the converter is operated at 230 V and 110 V at full load condition. Figure 13(b) is the comparison graph of traditional interleaved and BLIL boost converter as front-end converter for variable output power. The graph implies that the peak efficiency of the charger with BLIL PFC converter is 96.5%, whereas the traditional interleaved converter efficiency is 93%. The comparison of the charger setup with respect to control technique is analysed and shown in Figures 14(a) and 14(b). From the graph, it is inferred that the efficacy and power factor of the front-end converter of the charger are high for RI control than ACM control.

8. Conclusion

A high-performance two-stage converter topology for PHEV battery charger with improved PFC rectifier as front-end and a high-frequency ZVS-ZCS DC/DC converter as the second stage has been discussed in this paper. The operation, design considerations, and performance comparison with the traditional two-stage approach are presented. A nonlinear RI control technique is implemented for the front-end converter, which corrects power factor closer to unity in one switching cycle at variable load powers. THD of the input current is less than 5%, which is compliant with the IEC 61000 3-2 standard. For PFC converter and DC/DC converter, respectively, the proposed charger achieves a peak efficiency of 96.5% at 80 kHz and 100 kHz switching frequency. It operates for a wide output load variation. Thus, the overall designated charger unit achieves an efficiency of 3.5% higher than the conventional battery charger unit.

Data Availability

The data used to support the findings of this study are included in the article. Should further data or information be required, these are available from the corresponding author upon request.

Conflicts of Interest

The authors declare that there are no conflicts of interest regarding the publication of this paper.


The authors thank and acknowledge the management of Vellore Institute of Technology Chennai for their support to carry out this research work. The authors appreciate the supports from Saveetha School of Engineering, SIMATS, Chennai.