Research Article
Highly Accurate Timestamping for Ethernet-Based Clock Synchronization
Table 1
Comparison of the different approaches.
| Approach | Type | Advantage | Disadvantage | Complexity | Impl. effort | Accuracy |
| HSC | Single shot | Linearity | High-speed clocks | Low | Low | Medium | PSC | Single shot | No high-speed clocks | Linearity issues | Low | Low | Medium | TDL | Single shot | Single-event capturing | Temperature dependency | High | High | High–very high | TSA | Single shot avg. | Simplicity | Leakage effects | Low | Low | Low–medium | DPE | Phase estimator | High freq. range | Analog parts req. | High | Medium | High | PFE | Phase estimator | Purely digital, size | Narrow freq. range | Medium | Low | Medium–very high | PFE + TSA | Phase estimator avg. | At least PFE perf. | Correlation dependency | Medium | Low | Very high |
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