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Journal of Engineering
Volume 2013 (2013), Article ID 648540, 5 pages
http://dx.doi.org/10.1155/2013/648540
Research Article

Electronically Tunable Transimpedance Instrumentation Amplifier Based on OTRA

1Department of Electronics and Communication Engineering, Delhi Technological University, Delhi, India
2Department of Electronics Engineering, Indian School of Mines, Dhanbad, India

Received 31 August 2012; Revised 6 November 2012; Accepted 7 November 2012

Academic Editor: Jiun-Wei Horng

Copyright © 2013 Rajeshwari Pandey et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract

Operational transresistance amplifier (OTRA) is the most suitable analog building block (ABB) for transimpedance type signal processing due to its very nature of current input and voltage output. In this paper, OTRA-based transimpedance instrumentation amplifier (TIA) is presented. It provides high differential gain and bandwidth, which is independent of gain. It also offers high common-mode rejection ratio (CMRR). The amplifier gain can be controlled electronically by implementing resistors using MOS transistors operating in linear region. The circuit can be made fully integrated. The proposed circuit is insensitive to parasitic input capacitances and input resistances due to the internally grounded input terminals of OTRA. Theoretical analysis is verified through PSPICE simulations and experimentation.

1. Introduction

An instrumentation amplifier (IA) faithfully amplifies low level differential signals in the presence of high common-mode noise which makes it especially suitable as input stage of a signal processing system. The conventional voltage-mode instrumentation amplifiers based on operational amplifier are not capable of operating at higher frequencies because of slew rate and fixed gain-bandwidth product limitations [1]. The current mode approach has gained a lot of importance in the recent past due to its inherent wide bandwidth which is virtually independent of closed loop gain, greater linearity, and large dynamic range [1]. Thus the current-mode instrumentation amplifiers [24] are superior, in performance, to their voltage mode counterpart in terms of CMRR and frequency range of operation. The literature survey reveals that, currently, most of the current mode instrumentation amplifiers (CMIAs) use the second-generation current conveyor (CCII) [24]. These configurations are suitable for amplification of signals from voltage-source transducers. For amplification of signals from current-source transducers, TIA would be a better choice wherein the current input can be directly processed without conversion to voltage signal. An op-amp-based TIA is presented in [5], however, it uses two current to voltage converters followed by an amplifier. OTRA being a current input voltage output ABB is inherently suitable for TIA implementation [6]. Therefore, in this paper an OTRA-based TIA has been proposed. It offers a high differential gain and a bandwidth which is independent of gain, unlike a traditional voltage-mode IA. It also provides high common-mode rejection ratio (CMRR).

2. The Proposed Circuit

OTRA is a three terminal device, shown symbolically in Figure 1, and its port relations are characterized by (1), where is the transresistance gain of OTRA. For ideal operations, approaches infinity and forces the input currents to be equal. Thus, OTRA must be used in a negative feedback configuration [7, 8]. It is also free from parasitic input capacitances, and resistances as its input terminals are virtually grounded, and, hence, nonideality problem is less in circuits implemented with OTRA. Figure 2 shows the proposed circuit. It consists of three OTRAs and five resistors. The differential transimpedance gain () for the amplifier can be computed as follows: It can be seen from (4) that can be varied by varying the resistance .

648540.fig.001
Figure 1: OTRA Circuit symbol.
648540.fig.002
Figure 2: The proposed TIA.

Ideally the transresistance gain is assumed to approach infinity. However, practically is a frequency dependent finite value [8]. Considering a single pole model for the transresistance gain, can be expressed as where is low frequency transresistance gain, and is the pole angular frequency of the OTRA.

For high frequency applications, the transresistance gain reduces to where and is the parasitic capacitance of OTRA.

Taking this effect into account, output voltages at different nodes are given as where , , and are the parasitic capacitances of OTRA1, OTRA2, and OTRA3, respectively.

Considering in (9), the of the circuit given by (4) modifies to where is the uncompensated error function.

From (9), it is to be noticed that the gain can be adjusted by , and the bandwidth is controlled by . Thus, the gain of the amplifier can be adjusted by varying without affecting the bandwidth (BW).

From (9), by using , the transimpedance common-mode gain () can be computed as The performance parameter CMRR which defined as the ratio of differential gain to common-mode gain can be computed as For high frequency applications, compensation methods must be employed to account for the error introduced in (4) and given by (11). High frequency passive compensated topology of the TIA is shown in Figure 3. Routine analysis of Figure 3 results in where is the compensated error function.

648540.fig.003
Figure 3: TIA with high frequency compensation.

By taking and , reduces to 1, which makes (14) the same as (4). The effect of single pole model of can thus be eliminated.

It is well know that the linear passive resistor consumes a large chip area as compared to the linear resistor implementation using transistors operating in nonsaturation region. The differential input of OTRA allows the resistors connected to the input terminals of OTRA to be implemented using MOS transistors with complete nonlinearity cancellation [8]. Figure 4 shows a typical MOS implementation of resistance connected between negative input and output terminals of OTRA. The resistance value may be adjusted by appropriate choice of gate voltages of these transistors thereby making gain of TIA electronically tunable. The value of resistance so obtained is expressed as where , , , and are electron mobility, oxide capacitance per unit gate area, effective channel width, and effective channel length of MOS, respectively. and are the gate voltages. Thus, MOS transistor implementation of , , and not only makes the TIA gain electronically tunable but also makes the circuit suitable for integration. Figure 5 shows the MOS-based implementation of the proposed TIA.

648540.fig.004
Figure 4: MOS implementation of a linear resistance connected between negative input and output terminals of OTRA.
648540.fig.005
Figure 5: MOS-based implementation of the proposed TIA.

3. Simulation and Experimental Results

The performance of the proposed TIA is verified through SPICE simulation using 0.5 μm CMOS process parameters provided by MOSIS (AGILENT). CMOS implementation of the OTRA [9] shown in Figure 6 is used for simulation. Aspect ratios used for different transistors are the same as in [9] and are given in Table 1. The taken supply voltages are  V.

tab1
Table 1: Aspect ratio of the transistors in OTRA circuit.
648540.fig.006
Figure 6: CMOS implementation of OTRA [9].

Figure 7(a) shows the frequency response of the proposed amplifier. The input differential current was chosen as 5 mA. The component values are taken as  KΩ and  KΩ. is assigned values as 10 KΩ, 5 KΩ, and 0.8 KΩ, the differential gains obtained were 48 dB, 42 dB, and 26 dB, respectively. The 3 dB frequency of the amplifier is 10 MHz for all the three cases confirming that the bandwidth of the amplifier is independent of gain. Total power consumption of the proposed TIA is simulated to be 4.93 mW.

fig7
Figure 7: (a) Frequency response of the proposed TIA, (b) CMRR response of the proposed TIA, and (c) output noise spectral density of the proposed TIA.

Figure 7(b) shows the CMRR response of the circuit for differential gains of 26, 42, and 48 dB. It is observed that the proposed TIA exhibits a CMRR magnitude of 64.5 dB and bandwidth of 10 KHz, which is independent of gain.

The simulation results of the noise performance analysis of the proposed TIA are depicted in Figure 7(c). The component values are chosen to be the same as for differential gain. It may be noticed from the Figure 7(c) that the noise level being low would result in high signal-to-noise ratio of the TIA.

A hardware prototype of the proposed TIA is also designed to test its functionality experimentally. The OTRA is realized using commercial IC AD 844AN [10] as shown in Figure 8. Supply voltages used are  V. The experimental and simulated frequency response for the TIA, for  KΩ,  KΩ, and KΩ, are shown in Figure 9(a), and CMRR response is shown in Figure 9(b). The slight variations in experimental and simulated results may be due to tolerance of the component values. Observed outputs showing the performance of the proposed TIA at 70 KHz and 2 MHz for  KΩ,  KΩ, and  KΩ are given in Figure 9(c).

648540.fig.008
Figure 8: OTRA realization using commercial IC AD 844AN [10].
fig9
Figure 9: Experimental results of the proposed TIA.

4. Conclusion

An OTRA-based TIA is presented which is suitable for amplification of signals from current-source transducers. The circuit provides high gain for a wide range of frequencies, and the bandwidth of the amplifier is independent of its gain. The proposed circuit, to the best knowledge of authors, is the only current mode TIA. A voltage mode op-amp-based transresistance instrumentation amplifier is proposed in [5] which uses three op-amps and nine resistors, a quite large number as compared to the proposed TIA. Also, the amplifier of [5] was designed, for a specific low frequency application in a gamma-ray dosimeter, and its other performance parameters are not available for comparison.

The gain of the proposed amplifier can be electronically tuned by implementing the passive resistor using MOS transistor. This also makes the circuit fully integrated. The proposed circuit can easily be compensated for parasitics. It provides advantages of current mode design techniques and at the same time provides voltage output suitable for driving existing voltage mode circuits. Theoretical propositions are verified through PSPICE simulations and experimental results.

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