Journal of Electrical and Computer Engineering / 2009 / Article / Fig 2

Research Letter

Token-Aware Completion Functions for Elastic Processor Verification

Figure 2

Network of elastic controllers for the elastic 5-stage DLX processor shown in Figure 1. The J and F blocks denote the join and fork circuits. Valid is used to indicate valid data in the datapath. Stop is used to indicate that EB cannot accept data at this time.
480740.fig.002

Article of the Year Award: Outstanding research contributions of 2020, as selected by our Chief Editors. Read the winning articles.