Journal of Electrical and Computer Engineering

Research Article

Multi-FPGA Partitioning Method Based on Topological Levelization

Algorithm 1

Input: 𝐺 ( 𝑁 , 𝐸 ), 𝐷 = devices;
Output: 𝑃 1 , 𝑃 2 , 𝑃 3 , … , 𝑃 π‘˜
Create levels 𝐿 = { 𝐿 1 , 𝐿 2 , … , 𝐿 𝑛 } ;
π‘˜ = 0; 𝑗 = 1;
Proceed = True;
While (Proceed)
{
 Create new partition 𝑃 π‘˜ ;
 while (violation = False)
  {
   move level 𝐿 𝑗 to 𝑃 π‘˜ ; check constraints;
   mark the last level moved to 𝑃 π‘˜ as 𝐿 𝑗 and its
   successor 𝐿 𝑗 + 1 ; 𝑗 = 𝑗 + 1 ;
}
  Optimize 𝑃 π‘˜ subject to the current device 𝐷 π‘˜ ;
  if ( 𝐿 = 𝐷 π‘˜ + 1 ) / * if the remained of 𝐿 fit into
   the next device 𝐷 π‘˜ + 1 βˆ— /
  Proceed = False; else π‘˜ = π‘˜ + 1 ;
}