Research Article
VLSI Implementation of a Distributed Algorithm for Fault-Tolerant Clock Generation
Table 1
Hardware effort of a single TG-Alg and its components.
| | No. of basic gates | No. of C-Elements | area in [] | area in % |
| Remote Pipeline | — | 4 | 944 | 0.20 | Local Pipeline | — | 4 | 944 | 0.20 | Difference Module | 2 | 1 | 270 | 0.06 | PCSG | 6 | — | 395 | 0.08 |
| Counter | 8 | 9 | 2,553 | 0.05 | 11 Counters | 88 | 99 | 28,083 | 5.80 | circuit | 550 | — | 51,641 | 10.67 | circuit | 1,013 | — | 176,083 | 36.39 | Tick Generation | 2 | 1 | 303 | 0.06 |
| Threshold Modules | 3,128 | 1 | 455,751 | 94.19 |
| single TG-Alg | 3,218 | 100 | 483,862 | 100.00 |
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