Research Article
Improved Maximum Likelihood S-FSK Receiver for PLC Modem in AMR
Table 2
Memory and processing time analysis results for the PLC-modem DSP implementation.
| Module | PM space (16-bit Word) | DM space (16-bit Word) | Number of cycles machine during |
| Modulator module | 1620 | 656 | 3840 | ADC reception module | 1066 | 160 | 1280 | Correlation module | 246 | 656 | 2560 | S-FSK decision module | 87 | 32 | 156 | Initialization PHY module | 513 | 10 | 2323 | PHY layer FSM module | 3869 | 822 | 5236 |
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