Hardware and Software Synthesis of Heterogeneous Systems from Dataflow Programs

<table class="table-group" id="tab5"><tr><td><table class="table"><tr><td class="thead-hr" colspan="4"><hr/></td></tr><tr class="thead"><td align="left"></td><td align="center"> Serial link</td><td align="center"> Ethernet</td><td align="center"> PCIe</td></tr><tr><td class="thead-hr" colspan="4"><hr/></td></tr><tr><td align="left"> Spartan3</td><td align="center"> 0.2</td><td align="center"> 3.7</td><td align="center"> N.A.</td></tr><tr><td align="left"> ML509 with Virtex5</td><td align="center"> 0.2</td><td align="center">—</td><td align="center"> 8.5</td></tr><tr><td align="left"> P2020 with PowerPC</td><td align="center">—</td><td align="center"> 3.8</td><td align="center">—</td></tr><tr class="table-tr"><td colspan="4"><hr class="tbody-hr"/></td></tr></table></td></tr></table>

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Journal of Electrical and Computer Engineering

tab5

Table 5

Table 5: Hardware and Software Synthesis of Heterogeneous Systems from Dataflow Programs 