Journal of Electrical and Computer Engineering / 2012 / Article / Tab 5

Research Article

A State-Based Modeling Approach for Efficient Performance Evaluation of Embedded System Architectures at Transaction Level

Table 5

Maximal computational complexity and utilization of the processing resources observed for the two architectures considered.

Architecture IArchitecture II
𝑃 1 𝑃 2 𝑃 3
Maximal computational complexity (GOPS)Resource usage (%)Maximal computational complexity (GOPS)Resource usage (%)Maximal computational complexity (GOPS)Resource usage (%)


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