Journal of Electrical and Computer Engineering

Research Article

VLSI Architectures for Sliding-Window-Based Space-Time Turbo Trellis Code Decoders

Table 3

Complexity and decoding delay of best SW techniques.
Parameter set Mem. req. [bits] DFUs Decoding delay Ptrs
S F S , Π = 0 , 𝜋 = 1 ,
s f t = N o , 𝜀 = 0 𝐿 𝜋 2 𝐺 𝑤 𝐿 2+1/ 𝜋 ( 2 + 2 𝜋 ) 𝐿 / ( 2 + 𝜋 ) 𝐿 0
D F S , Π = 𝐿 , 𝜋 = 1 ,
s f t = 𝐿 / 2 , 𝜀 = 0 𝐿 𝜋 2 𝐺 𝑤 𝐿 4+2/ 𝜋 2 𝐿 + 5 s f t / 2 𝐿 + 3 s f t 0
S F S / P N T , Π = 0 , 𝜀 = 1 ,
s f t = N o , 𝜀 ( 𝐿 / ( 𝜀 + 1 ) ) 2 𝐺 𝑤 𝐿 4 4 𝐿 / 4 𝐿 − ( 1 / ( 𝜀 + 1 ) ) 𝐿 𝜀 2 𝐺 𝑤 𝐿