Journal of Electrical and Computer Engineering

Research Article

Ultra-Low Leakage Arithmetic Circuits Using Symmetric and Asymmetric FinFETs

Figure 12

(a) Symmetric SG/LP transmission gate-based FinFET MUX, (b) asymmetric SG/LP transmission gate-based FinFET MUX.
454392.fig.0012a
(a)
454392.fig.0012b
(b)