A Study on the Optimal Receiver Impedance for SNR Maximization in Broadband PLC

<div class="floats-full-page floats-full-page-figure"><h2>Figure 2</h2><div class="floats-full-page-caption"><table>Block diagram of the PLC receiver AFE [<a href="../../635086/#B6">6</a>]. </table></div><div class="floats-full-page-content"><table class="table-group" width="800px"><tr class="fig-image"><td><img alt="635086.fig.002" src="https://static-01.hindawi.com/articles/jece/volume-2013/635086/figures/635086.fig.002.jpg" /></td></tr></table></div></div>

Figure 2 | A Study on the Optimal Receiver Impedance for SNR Maximization in Broadband PLC

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Figure 2: A Study on the Optimal Receiver Impedance for SNR Maximization in Broadband PLC

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