Asynchronous Realization of Algebraic Integer-Based 2D DCT Using Achronix Speedster SPD60 FPGA

Figure 2

The 2D AI-DCT consists of an input section having a decimation structure, 1D 8-point AI-DCT block for column-wise DCTs, a real-time AI transpose buffer [16], four parallel 1D 8-point AI-DCT blocks for row-wise DCTs, and the FRS [16].