Steady-State Response of Periodically Switched Linear Circuits via Augmented Time-Invariant Nodal Analysis

Table 2

CPU-time required by the simulation of the circuit of Figure 6 and accuracy of the computed current and voltage responses and , for an increasing number of terms defining their truncated expansions (e.g., see (23)).

Method	ODE  ns; μs	Extended MNA
		CPU-time	34.5 s	0.029 s	0.051 s	0.076 s	0.19 s	0.24 s	0.445 s	1.1 s
Relative error	Reference	3.3%	0.9%	0.3%	0.08%	0.05%	0.04%	0.02%
Relative error	Reference	4.9%	1.7%	0.6%	0.2%	0.14%	0.1%	0.07%