A 3.9 <i>μ</i>s Settling-Time Fractional Spread-Spectrum Clock Generator Using a Dual-Charge-Pump Control Technique for Serial-ATA Applications

<table class="figure-group"><tr class="fig-image" id="a"><td><object data="https://static.hindawi.com/articles/jece/volume-2015/765485/figures/765485.fig.002a.svgz" name="765485.fig.002a" type="image/svg+xml"></object></td></tr><tr class="fig-caption"><td><b>(a) </b>Conventional</td></tr><tr class="fig-image" id="b"><td><object data="https://static.hindawi.com/articles/jece/volume-2015/765485/figures/765485.fig.002b.svgz" name="765485.fig.002b" type="image/svg+xml"></object></td></tr><tr class="fig-caption"><td><b>(b) </b>Proposed</td></tr></table>

<div>Proposed low power SATA-PHY operation.</div>

Journal of Electrical and Computer Engineering

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Figure 2

Figure 2: A 3.9 <i>μ</i>s Settling-Time Fractional Spread-Spectrum Clock Generator Using a Dual-Charge-Pump Control Technique for Serial-ATA Applications 

Journal of Electrical and Computer Engineering

A 3.9 μs Settling-Time Fractional Spread-Spectrum Clock Generator Using a Dual-Charge-Pump Control Technique for Serial-ATA Applications

Figure 2