Modelling and Automated Implementation of Optimal Power Saving Strategies in Coarse-Grained Reconfigurable Architectures

Table 9

FFT use case: clock gating overhead estimation step accuracy.

LR	CG overhead%			Overhead	Net
	Est.	Real	Err.%	Err.%	Err.%
	−5.73	−5.77	0.06	0.83	0.18
	−1.42	−1.42	0.12	1.03	0.40
	−1.34	−1.38	0.05	0.84	0.21
	−0.39	−0.39	0.05	0.96	0.22
	−0.12	−0.12	0.29	1.08	0.47